IBM and Siemens pair chip research with design software

IBM and Siemens have begun a research collaboration that pairs IBM’s semiconductor-device work with Siemens’ electronic design automation, process-simulation, lithography-optimization and advanced-manufacturing software. The goal, the companies said, is to develop the design and manufacturing methods needed for future generations of IBM’s three-dimensional nanostack transistor architecture.

The collaboration covers design, simulation and lithography techniques for IBM’s current 7-angstrom research node and later generations. The division of work gives IBM access to Siemens’ design and manufacturing software expertise as the companies study how the architecture could be fabricated.

The companies also plan to build virtual models to estimate performance, optimize designs and surface fabrication problems before physical chips are made. The announcement did not identify specific Siemens products, financial terms, a research budget, a contract duration or a milestone schedule.

Nanostack places nanosheet transistor channels in upper and lower tiers instead of arranging the devices only side by side. IBM’s 2025 technical paper describes sequential integration, flexible channel placement and thin dielectric bonding between tiers. The 7-angstrom label names a process generation; IBM says it is not a literal measurement shared by every feature on the chip.

IBM-affiliated researchers project that the architecture could provide about 50% area scaling, roughly 50% higher performance at the same power, or about 70% lower power at the same performance than IBM’s 2-nanometer node. Those are research projections, not independently verified results from commercial chips. Readers tracking the distinction between evaluation milestones and proven results can also see IBM’s separate quantum benchmarking milestone.

The companies describe the program as work toward manufacturability, not a production launch. It does not announce a commercial chip, customer, manufacturing partner, production commitment or production date.

IBM also plans to make an early research-and-development process design kit available in the first quarter of 2027.